Warning! This is the archived 1999 Fabweb site! Here is the latest site

Comments on the ECE 344 Process

Semiconductor processing is a time-consuming business. For example, on a commercial basis it is not unusual for over 50 hours of actual processing time to be used in converting a single wafer into a batch of tested but unpackaged chips. Since you are to perform three experiments/exercises in some 14 lab sessions, compromises must be made in order to save time. For this reason the diffusion intervals you use are much shorter than would be typical in commercial practice. Short diffusion times result in shallow junction depths. The figures shown below give some typical dimensions:

	
                     XjE, microns     XjC, microns	
                   ---------------------------------	
     commercial       2 - 2.5           2.7 - 3.5	
     our lab         0.2 - 0.5          1.2 - 2

Shallow emitter junctions tend to give higher than normal values of RSE, the emitter sheet resistance. This, in turn, can act to lower the (BJT) transistor beta as may be seen by the approximate equation:

	
     1/Beta= RSE/RBB + 1/2 (Wb/Lmb)²	(1)

     where   RSE = emitter sheet resistance		
             RBB = buried base layer (between emitter and collector) sheet resistance		
             Wb = XjC - XjE = base width		
             Lmb = base minority carrier diffusion length.	

For typical numbers in our lab, the first term in Equation (1) will be dominant; hence a high value of RSE due to a shallow XjE will result in a low beta.

Time restrictions also make it unfeasible for you to make standard integrated circuits. We cannot afford to carry out the steps involved in isolating the devices from each other. You will, however, make arrays of discrete devices covering nearly all devices that are used in ICs, namely:

	
     Single Diffusion        Double Diffusion	

     diodes                  BJTs	
     diffused resistors      N-MOSTs		
     MOS capacitors	
     P-MOSTs	

The most common form of isolation, so-called junction isolation (JI), requires a very deep isolation diffusion which extends from the wafer surface through the epitaxial layer (epi). Again, time limitations preclude such a long (up to several hours) diffusion. In summation, as you do the work in the microelectronics laboratory, learn the procedures and processes you use. For the most part, they are typical of commercial practice. But remember that diffusion cycles are short and Betas are low by normal standards.


ECE 344 home page.

This screen was created by Mike Fitzimmons - U of Illinois ECE Dept. - mikef@uiuc.edu,
and is maintained by Kevin Beernink - U of Illinois ECE Dept. - beernink@uiuc.edu
E-mail comments and suggestions to ece344@uiuc.edu or use the FEEDBACK FORM.
process.html updated 05/14/96

Warning! This is the archived 1999 Fabweb site! Here is the latest site